CPU / main boards

ESP32 MCU Selection Reference

Choose by package, Flash, GPIO, and power; verify against the original page and your own measurements.

CPU / main boards esp32selectionpackageflashgpiopower

Official path: https://so.szlcsc.com/global.html

01 Overview

This is a selection reference for ESP32-family MCUs, not a full datasheet for any specific part. Start by filtering on package and pin count so you don't end up with a board that lacks pins or has the wrong footprint.

Flash and PSRAM size directly affect how you partition OTA updates, whether you can enable large buffers, and whether memory-hungry algorithms can run. Decide how much firmware you need to store and whether you want dual-bank OTA before picking a size.

For low-power designs, don't rely on nominal current numbers alone. Check deep sleep current, wake sources (timer, GPIO, touch, etc.), and whether RTC memory is sufficient. Also account for wake-up time in your power budget.

Audit peripherals early: number of ADC channels, DAC outputs, touch pins, USB port type (some parts only have UART), and available SPI/I2C/UART. If you run short, either pick a different variant or add external chips.

The selection is only a starting point; always verify against the official datasheet and your own measurements. Electrical parameters vary with batch and temperature, so leave margin on critical specs.

02 Hardware

  • Package: Common QFN and module types with pin counts ranging from dozens to over a hundred. QFN suits custom boards; modules include antenna and RF matching, ideal for quick validation or teams without RF expertise.
  • Power: Typically 3.3V, but mind peak current draw (hundreds of mA during RF transmission). Follow the datasheet for supply ripple and decoupling capacitors—don't skimp.
  • Flash: Usually 4MB minimum, some variants include PSRAM (e.g., 8MB). Size affects OTA partitioning and buffering, so decide early.
  • GPIO: Limited count, and many pins have alternate functions (JTAG, ADC, touch). Check the pin mux table in the datasheet to avoid conflicts.
  • Peripherals: Common SPI, I2C, UART, ADC, DAC, touch, PWM, etc. Note ADC input range and accuracy, and whether you really need DAC.
  • Strapping pins: Some pins have boot/download strapping functions. Design external circuitry and power-up timing per the datasheet, or you may fail to download or boot.
  • Antenna (modules): Keep the antenna area clear of copper and traces; otherwise RF performance degrades. See the module hardware design guide for layout rules.
  • Thermal: Under heavy load the chip heats up; consider package and PCB layout for heat dissipation to avoid thermal throttling.

03 Software flow

After locking the specific part, set the correct target (e.g., esp32, esp32s3) and sdkconfig in ESP-IDF. Copy pin numbers from that part's datasheet, not from another series.

Prove the download path with the official hello_world example—verify toolchain, drivers, and basic board function—before adding peripheral drivers.

Configure peripherals according to your selection: ADC channels, USB port type (if any), PSRAM enable (in menuconfig), and Flash frequency/mode.

When writing drivers, verify each peripheral individually (e.g., blink an LED, read a sensor) before combining. Check for pin mux conflicts using the GPIO matrix or pin mapping.

For low power: configure deep sleep and wake sources (timer, GPIO, touch), measure actual current, and manage peripheral power (e.g., disable unused clocks).

Size OTA and buffers to Flash/PSRAM: partition table, dual-bank, buffer sizes—do not keep another module's defaults.

Before production, run stress and long-duration tests to catch memory leaks, Wi-Fi instability, and temperature effects.

04 Core points

Don't just count pins; watch for mux conflicts and strapping pins, or you'll end up with an unusable board.

Different series (e.g., ESP32 vs ESP32-S3) have different pin definitions and peripherals; don't copy code or schematics across series.

ADC calibration and accuracy vary with chip and temperature; calibrate or add external conditioning if you need precision.

PSRAM is not enabled by default; you must enable it in build config, and note it's slower than internal SRAM.

Module RF performance depends on antenna layout; follow the guidelines for keep-out and matching, or Wi-Fi range and throughput suffer.

Low-power designs require real measurements; datasheet values are nominal, and actual circuit and firmware affect current.

中文

主控 / CPU

ESP32 主控选型参考

按封装、Flash、GPIO 和功耗选型,先看原页和实测。

主控 / CPU esp32selectionpackageflashgpiopower

官方路径: https://so.szlcsc.com/global.html

01 项目概述

本文是 ESP32 系列主控的选型参考,不是某个具体型号的完整数据手册。选型时先按封装和引脚数筛掉不合适的,避免画完板才发现引脚不够或封装对不上。

Flash 和 PSRAM 容量直接决定 OTA 分区怎么划、能不能开大缓存、能不能跑需要内存的算法。先想清楚产品要存多少固件、要不要双备份,再定容量。

低功耗场景不能只看标称电流,要确认 deep sleep 电流、唤醒源(定时器、GPIO、触摸等)以及 RTC 内存是否够用。唤醒后的启动时间也要算进去。

外设资源要提前核对:ADC 通道数、DAC 输出、触摸引脚、USB 口类型(有的只有 UART)、SPI/I2C/UART 数量。不够用就得换型号或加外部芯片。

选型结果只是起点,最终以官方数据手册和实际测量为准。不同批次、不同温度下电气参数会有差异,关键指标要留余量。

02 项目硬件描述

  • 封装: 常见 QFN 和模组,引脚数从几十到上百不等。QFN 适合自己画板,模组带天线和射频匹配,适合快速验证或射频经验不足的团队。
  • 供电: 典型 3.3V,注意峰值电流(射频发射时可能到几百 mA)。电源纹波和去耦电容按数据手册要求放,别省。
  • Flash: 一般 4MB 起步,部分型号带 PSRAM(如 8MB)。容量影响 OTA 分区和内存缓冲,选型时就要定好。
  • GPIO: 数量有限,且很多引脚有复用功能(如 JTAG、ADC、触摸)。设计前查数据手册的引脚复用表,避免冲突。
  • 外设: 常见 SPI、I2C、UART、ADC、DAC、触摸、PWM 等。注意 ADC 的输入范围和精度,DAC 是否真的需要。
  • 启动配置: 部分引脚有 strapping 功能(如 boot 选择、下载模式),上电时序和外部电路要按手册设计,否则可能无法下载或启动异常。
  • 天线(模组): 模组的天线区域要净空,周围不要铺铜或走线,否则影响射频性能。具体布局要求见模组硬件设计指南。
  • 散热: 高负载运行时芯片会发热,封装和 PCB 布局要考虑散热,避免热降频影响性能。

03 项目软件流程描述

锁定具体型号后,在 ESP-IDF 中设置正确的 target(如 esp32、esp32s3)和 sdkconfig,脚号按该型号数据手册,不要混系列照抄。

先用官方 hello_world 例程验证下载链路和串口输出,确认工具链、驱动、板子基本正常,再上外设驱动。

按选型结果配置外设:ADC 通道、USB 口类型(如果有)、PSRAM 开关(在 menuconfig 中使能)、Flash 频率和模式。

编写外设驱动时,先逐个验证(如点亮 LED、读取传感器),再组合功能。注意引脚复用冲突,用 GPIO 矩阵或引脚映射表检查。

低功耗设计:配置 deep sleep 和唤醒源(定时器、GPIO、触摸),测量实际电流,调整外设电源管理(如关闭不用的外设时钟)。

OTA 和缓存策略根据 Flash / PSRAM 容量调整:分区表大小、双备份、缓冲区大小等,不要沿用其他模组的默认值。

量产前做压力测试和长时间运行测试,检查内存泄漏、Wi-Fi 稳定性、温度影响。

04 项目核心点

选型时不要只看引脚数,还要看复用冲突和 strapping 引脚,否则画完板才发现不能用。

不同系列(如 ESP32、ESP32-S3)的引脚定义和外设不完全一样,代码和原理图不能直接照搬。

ADC 校准和精度受芯片和温度影响,要求高时需做校准或外部处理。

PSRAM 不是默认开启的,需要在编译配置里打开,并且注意访问速度比内部 SRAM 慢。

模组的射频性能依赖天线布局,净空和匹配要按指南做,否则 Wi-Fi 距离和吞吐会变差。

低功耗设计要实测,不要只看数据手册标称值,因为实际电路和固件会影响电流。